研究キーワード
 環太平洋,FDI,国際資本移動,東北アジア,直接投資,北東アジア,マクロ資本ストック,ハードウェア設計,命令写像,演算器ネットワーク,粗粒度再構成,アクセラレータ,異種命令混在実行,区間再利用,ERELA,TACHYON,VPP,OROCHI,LAPP,EMAX,フィルムコンピュータ,プロセッサアーキテクチャ,コンピュータアーキテクチャ,大規模FPGA,実LSI試作環境,商用プロセッサ,高速並列シミュレータ,自己修復,コヒーレントキャッシュ,メニィコア,メニィアクセラレータ,演算器アレイ,エミュレーション,動的命令変換,３値CAM,自動メモ化,曖昧再利用,多重再利用,ベクトル,VLIW,高信頼低電力プロセッサ,グリーンIT,計算機アーキテクチャ,3次元画像処理,SPARC,分散共有メモリ,実時間可視化,数値シミュレーション,投機処理,メモリ・アーキテクチャ,事前実行,値再利用,値予測,触診シミュレーション,JAVA,スーパーコンピュータ,触診,値予想,専用通信ハードウェア,グラフィックスハードウェア,光接続,メモリ管理,動的負荷分散,Wakeup,実時間シミュレーション,Select,光LAN,体感型シミュレーション,バイトコード,ネットワーク・コンピューティング,ネットワーク・コンピュータ,マイグレーション,医用VR,Dualflow,剥離シミュレーション,可視化・可触化,シミュレーションステアリング,グラフィクスハードウェア,京都大学,可視化,ボリュームレンダリング,計算機クラスタ,実時間処理,負荷分散,並列処理,半導体超微細化,FPGA,ディペンダブル・コンピューティング,ハイパフォーマンス・コンピューティング,半導体微細化,自己安定回路,データベース,製造ばらつき
研究分野
 人文・社会 / 経済統計,情報通信 / 情報ネットワーク,情報通信 / 計算機システム
研究室概要
 Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。
学術論文
"MINA: A Hardware-Efficient and Flexible Mini-InceptionNet Accelerator for ECG Classification in Wearable Devices," IEEE Transactions on Circuits and Systems I: Regular Papers, 19 Mar. 2025
Pham Hoai Luan, Tran Thi Diem, Le Vu Trung Duong, Yasuhiko Nakashima
"Neuromorphic system using capacitor synapses," Scientific Reports, Mar. 2025
Reon Oshio, Takumi Kuwahara, Takeru Aoki, Mutsumi Kimura, Yasuhiko Nakashima
"Energy Consumption Optimization of Multi-dimensional U-Nets on CGLA," IEEE Access, Feb. 2025
Duong Thi Sang, Ren Imamura, Tomoya Akabe, Yasuhiko Nakashima
"IMAX: A Power-efficient Multilevel Pipelined CGLA and Applications," IEEE Access, Jan. 2025
Tomoya Akabe, Le Vu Trung Duong, Yasuhiko Nakashima
[ doi:10.1109/ACCESS.2024.3524415 ]
"MRCA 2.0: Area-Optimized Multi-grained Reconfigurable Cryptographic Accelerator for Securing Blockchain-based IoT Systems," IEEE Micro, 20 Dec. 2024
Pham Hoai Luan, Le Vu Trung Duong, Tuan Hai Vu, Van Duy Tran, Van Tinh Nguyen, Thi Diem Tran, Yasuhiko Nakashima
"CTFE: A High-Efficient Heterogeneous Cryptographic CGRA for Diverse Security Applications," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems(TCAD), 4 Nov. 2024
Le Vu Trung Duong, Pham Hoai Luan, Tran Thi Hong, Tran Van Duy, Vu Tuan Hai, Yasuhiko Nakashima
"ECG Captioning with Prior-Knowledge Transformer and Diffusion Probabilistic Model," Journal of Healthcare Informatics Research, 27 Sep. 2024
Thi Diem Tran, Ngoc Quoc Tran, Thi Thu Khiet Dang, Hoai Luan Pham, Yasuhiko Nakashima
"Fusion synapse by memristor and capacitor for spiking neuromorphic systems," Neurocomputing, vol.Volume 593, Aug. 2024
Takumi Kuwahara, Reon Oshio, Mutsumi Kimura, Renyuan ZHANG, Yasuhiko Nakashima
"SuperSIM: A comprehensive benchmarking framework for neural networks using superconductor josephson devices," Journal of Superconductor Science and Technology, vol.27, no.9, Aug. 2024
Guangxian Zhu, Kan Yirong, Renyuan Zhang, Yasuhiko Nakashima, Wenhui Luo, Naoki Takeuchi, Nobuyuki Yoshikawa, Olivia Chen
"Analog Memcapacitor by Ferroelectric Capacitor and its Application to Spiking Neuromorphic System," IEEE Transactions on Electron Devices, pp4626-4630, 2024.8
Yuma Ishisaki, Reon Oshio, Takumi Kuwahara, Michihiro Shintani, Eisuke Tokumitsu, Tokiyoshi Matsuda, Hidenori Kawanishi, 中島　康彦, 木村　睦
"LiCryptor: High-speed and Compact Multi-Grained Reconfigurable Accelerator for Lightweight Cryptography," IEEE Transactions on Circuits and Systems I: Regular Papers, Jul. 2024
Pham Hoai Luan, Le Vu Trung Duong, Vu Tuan Hai, Tran Van Duy, Yasuhiko Nakashima
"Flexible and Energy-efficient Crypto-Processor for Arbitrary Input Length Processing in Blockchain-based IoT Applications," IEICE Journal, Mar. 2024
Le Vu Trung Duong, Pham Hoai Luan, Thi Hong Tran, Yasuhiko Nakashima
"Spiking Neuromorphic System using Memcapacitors and Pulse Accumulation Circuits," IEICE NOLTA, Aug. 2023
Atsushi Sawada, Reon Ochio, Mutsumi Kimura, Renyuan ZHANG, Yasuhiko Nakashima
"Neuromorphic System using Crosspoint-type TaOx/Ta Memristors and Direct Device Training for Associative Memory," IEEE Trans. on Electron Devices, Aug. 2023
Mutsumi Kimura, Tanaka Ryo, Isao Horiuchi, Yasushi Hiroshima, Yasuhiko Nakashima
"Implementation of Fully-Pipelined CNN Inference Accelerator on FPGA and HBM2 Platform," IEICE Trans., Vol.E10X-D, Jul. 2023
Van-Cam Nguyen, Yasuhiko Nakashima
"Flexible and Scalable BLAKE/BLAKE2 Coprocessor for Blockchain-based IoT Applications," IEEE Design & Test, Jul. 2023
Pham Hoai Luan, Le Vu Trung Duong, Thi Hong Tran, Yasuhiko Nakashima
"A Compressed Spiking Neural Network onto Memcapacitive in-Memory Computing Array," IEEE Micro, Jul. 2023
R.Oshio, T.Sugahara, A.Sawada, Mutsumi Kimura, Renyuan ZHANG, Yasuhiko Nakashima
"リニアアレイ型CGRAの高速コンパイルを利用したJIT実行環境の開発," 電子情報通信学会論文誌D, 2022.10
稲益秀成, 船井遼太郎, 中島　康彦
"Bisection Neural Network Toward Reconfigurable Hardware Implementation," IEEE Transactions on Neural Networks and Learning Systems, Sep. 2022
Chen Yan, Renyuan ZHANG, Kan Yirong, Yang Sa, Yasuhiko Nakashima
"Multilayer Crossbar Array of Amorphous Metal-Oxide Semiconductor Thin Films for Neuromorphic Systems," IEEE Journal of the Electron Devices Society, Sep. 2022
Etsuko Iwagi, Takumi Tsuno, Takahito Imai, Yasuhiko Nakashima, Mutsumi Kimura
"Application of Machine Learning to Environmental DNA Metabarcoding," IEEE Access, Sep. 2022
Mutsumi Kimura, Hiroki Yamanaka, Yasuhiko Nakashima
"A Hybrid Bayesian-Convolutional Neural Network for Adversarial Robustness," IEICE Trans., Vol.E105-D, No.7, Aug. 2022
Thi Thu Thao Khong, Takashi Nakada, Yasuhiko Nakashima
"Compact Message Permutation for a Fully Pipelined BLAKE-256/512 Accelerator," IEEE Access, Aug. 2022
Hoai Luan Pham, Tran Thi Hong, Vu Trung Duong Le, Yasuhiko Nakashima
"Neuromorphic chip integrated with a large-scale integration circuit and amorphous-metal-oxide semiconductor thin-film synapse devices," Scientific Reports, Apr. 2022
Mutsumi Kimura, Yuki Shibayama, Yasuhiko Nakashima
"GPGPU Implementation of Variational Bayesian Gaussian Mixture Models," IEICE Journal Volume and Number: Vol.E105-D,No.3, Mar. 2022
Hiroki Nishimoto, Renyuan ZHANG, Yasuhiko Nakashima
"A High-Efficiency FPGA-Based Multimode SHA-2 Accelerator," IEEE Access, Vol.10, pp.11830-11845, Jan. 2022
Hoai Luan Pham, Tran Thi Hong, Vu Trung Duong Le, Yasuhiko Nakashima
"Flexible Bayesian Inference by Weight Transfer for Robust Deep Neural Networks," IEICE Trans. Information and Systems, Dec. 2021
Khong Thi Thu Thao, Takashi Nakada, Yasuhiko Nakashima
"MRSA: A High-Efficiency Multi ROMix Scrypt Accelerator for Cryptocurrency Mining and Data Security," IEEE Access, Dec. 2021
Vu Trung Duong Le, Hoai Luan Pham, Tran Thi Hong, Yasuhiko Nakashima
"STT-BSNN: An In-Memory Deep Binary Spiking Neural Network Based on STT-MRAM," IEEE Access, Nov. 2021
Van Tinh NGUYEN, Kien Trinh, Renyuan ZHANG, Yasuhiko Nakashima
"BCA: A530-mWMulticoreBlockchainAccelerator for Power-ConstrainedDevicesinSecuring Decentralized Networksp," IEEE Transactions on Circuits and Systems I: Regular Papers, Sep. 2021
Tran Thi Hong, Hoai Luan Pham, Tri Dung Phan, Yasuhiko Nakashima
"Neuromorphic System using Memcapacitors and Autonomous Local Learning," IEEE Transactions on Neural Networks and Learning Systems IF=10.451, Sep. 2021
Mutsumi Kimura, Ishisaki Yuma, Miyabe Yuta, Yoshida Homare, Ogawa Isato, Yokoyama Tomoharu, Haga Ken-ichi, Tokumitsu Eisuke, Yasuhiko Nakashima
"DiaNet: An Elastic Neural Network for Effectively Re-configurable Implementation," Elsevier-Journal Neurocomputing IF=5.719, Sep. 2021
Man Wu, Yirong Kan, Tati Erlina, Renyuan ZHANG, Yasuhiko Nakashima
"MuGRA: A Scalable Multi-Grained Reconfigurable Accelerator Powered by Elastic Neural Network," IEEE Transactions on Circuits and Systems I: Regular Papers, Aug. 2021
Kan Yirong, Man Wu, Renyuan ZHANG, Yasuhiko Nakashima
"A Feasibility Study of Multi-Domain Stochastic Computing Circuit," IEICE Trans., Vol.E104-C, No.5, May. 2021
Tati Erlina, Renyuan ZHANG, Yasuhiko Nakashima
"A High-Performance Multimem SHA-256 Accelerator for Society 5.0," IEEE Access, Mar. 2021
Tran Thi Hong, Pham Hoai Luan, Yasuhiko Nakashima
[ doi:10.1109/ACCESS.2021.3063485 ]
"Construction of an Efficient Divided/Distributed Network Model using Edge Computing," IEICE TRANSACTIONS on Information and Systems, vol.E103-D, no.10, pp2072-2082, 1 Oct. 2020
Ryuta SHINGAI, Yuria HIRAGA, Hisakazu FUKUOKA, Takamasa MITANI, Takashi Nakada, Yasuhiko Nakashima
""好きなことを靭やかに頑固に素早く", 情報・システムソサイエティ誌 フェローからのメッセージ," 情報・システムソサイエティ誌, Vol.25, No.2, pp.19-20, Aug. (2020), 2020.8
中島　康彦
"Double SHA-256 Hardware Architecture with Compact Message Expander for Bitcoin Mining," IEEE Access, vol.8, pp139634-139646, Jul. 2020
Hoai Luan Pham, Tran Thi Hong, Tri Dung Phan, Vu Trung Duong Le, Duc Khai Lam, Yasuhiko Nakashima
[ doi:10.1109/ACCESS.2020.3012581 ]
"Daisy-chained Systolic Array and Reconfigurable Memory Space for Narrow Memory Bandwidth," IEICE Trans., vol.E103-D, no.03, pp578-589, Apr. 2020
Jun Iwamoto, Yuma Kikutani, Renyuan ZHANG, Yasuhiko Nakashima
"Influence of characteristic variation of oxide semiconductor and comparison of the activation function in neuromorphic hardware," IEICE Trans. NOLTA, Vol.E11-N, No.2, Apr. 2020
Hiroya Ikeda, Hiroki Yamane, Yuta Takishita, Mutsumi Kimura, Yasuhiko Nakashima
"A Low Complexity Joint Encryption-Modulation Method for IoT Sensor Transceivers," Electronics journal, vol.9, no.4, Apr. 2020
Dai Long Hoang, Tran Thi Hong, Yasuhiko Nakashima
[ doi:10.3390/electronics9040663 ]
"Memristor property of an amorphous SN-Ga-O thin-film device deposited using chemical-vapor-deposition method," AIP Advances, Feb. 2020
Yuta Takishita, Masaki Kobayashi, Kazuki Hattori, Tokiyoshi Matsuda, Sumio Sugisaki, Yasuhiko Nakashima, Mutsumi Kimura
"Programmable Analog Calculation Unit with Two-Stage Architecture: A Solution of Efficient Vector-Computation," IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences, vol.E102-A, no.7, pp878-885, 1 Jul. 2019
Renyuan ZHANG, Takashi Nakada, Yasuhiko Nakashima
[ doi:10.1587/transfun.E102.A.878 ]
"DSA並みの効率を達成するCNNs拡張機能付きCGRAの提案と評価," IEICE Trans, vol.J102-D, no.07, 2019.7
Takahiro ICHIKURA, Yuma KIKUTANI, 中島　康彦
"Neuromorphic System with Crosspoint-type Amorphous Ga-Sn-O Thin-Film Devices as Self-Plastic Synapse Elements," ECS Trans., Vol. 90, Jul. 2019
Mutsumi Kimura, K. Umeda, K. Ikushima, T. Hori, R. Tanaka, J. Shimura, A. Kondo, T. Tsuno, S. Sugisaki, A. Kurasaki, K. Hashimoto, T. Matsuda, T. Kameda, Yasuhiko Nakashima
"An Efficient ReRAM-based Inference Accelerator for Convolutional Neural Networks via Activation Reuse," IEICE Electronics Express, vol.16, no.18, pp20190396-20190396, Jul. 2019
Yan CHEN, Jing ZHANG, Yuebing XU, Yingjie ZHANG, Renyuan ZHANG, Yasuhiko Nakashima
"A ReRAM-based Row-column-oriented Memory Architecture for Convolutional Neural Network," IEICE Trans. Electron, Jun. 2019
Yan CHEN, Jing ZHANG, Yuebing XU, Yingjie ZHANG, Renyuan ZHANG, Yasuhiko Nakashima
"Memristive characteristic of an amorphous Ga-Sn-O thin-film device," Scientific Reports, no.2757, Feb. 2019
Sumio Sugisaki, Tokiyoshi Matsuda, Mutsunori Uenuma, Toshihide Nabatame, Yasuhiko Nakashima, Takahito Imai, Yusaku Magari, Daichi Koretomo, Mamoru Furuta, Mutsumi Kimura
"Design of Programmable Analog Calculation Unit by Implementing Support Vector Regression for Approximate Computing," IEEE MICRO, Dec. 2018
Renyuan ZHANG, Noriyuki Uetake, Takashi Nakada, Yasuhiko Nakashima
"Log-Likelihood Ratio Calculation using 3-bit Soft-Decision for Error Correction in Visible Light Communication Systems," IEICE Trans., Vol.E101-A, No.12, pp.2210-2212, Dec. 2018
Dinh Dung Le, Tran Thi Hong, Yasuhiko Nakashima
""ソザイエティ人図鑑N0.22 中島康彦さん (CPSY研究会)", 情報・システムソサイエティ誌," 情報・システムソサイエティ誌, Vol.23, No.2, pp.4-7, Oct. (2018), 2018.10
中島　康彦
"In-Ga-Zn-O Thin-Film Devices as Synapse Elements in a Neural Network," IEEE J. Electron Devices Society, Apr. 2018
Mutsumi Kimura, Yuki Koga, Hiroki Nakanishi, Tokiyoshi Matsuda, Tomoya Kameda, Yasuhiko Nakashima
"A Tree-based Checkpointing Architecture for the Dependability of FPGA Computing," IEICE Transactions on Information and Systems, vol. E101-D, no.2, pp288-302, 1 Feb. 2018
Hoang-Gia VU, Shinya TAKAMAEDA-YAMAZAKI, Takashi Nakada, Yasuhiko Nakashima
"Joint Polar and Run-length Limitted Decoding Scheme for Visible Light Communication Systems," IEICE Communications Express Letter, Vol.7, Issue 1, pp.19-24, Jan. 2018
Dinh-Dung Le, D.P., Nguyen, Tran Thi Hong, Yasuhiko Nakashima
"Cellular neural network formed by simplified processing elements composed of thin-film transistors," Elsevier-Journal online, Mar. 2017
Mutsumi Kimura, Ryohei Morita, Sumio Sugisaki, Tokiyoshi Matsuda, Tomoya Kameda, Yasuhiko Nakashima
"A Multi-mode Error-Correction Solution based on Split-Concatenation for Wireless Sensor Nodes," Journal of Communications (JCM) Vol.12, No.2, pp.130-136, Doi:10.12720/jcm.12.2.130-136, Feb. 2017
Duc Phuc Nguyen, Tran Thi Hong, Yasuhiko Nakashima
"Performance Optimization of Light-field Applications on GPU," IEICE Trans., Vol.E99-D, No.12, pp.3072-3081, Dec. 2016
Yuttakon YUTTAKONKIT, Shinya TAKAMAEDA-YAMAZAKI, Yasuhiko Nakashima
"Performance Evaluation of a 3D-Stencil Library for Distributed Memory Array Accelerators," IEICE Trans., no.E98-D, Dec. 2015
Yoshikazu Inagaki, Takamaeda Shinya, Jun YAO, Yasuhiko Nakashima
"A Flexible, Self-Tuning, Fault-Tolerant Functional Unit Array Processor," IEEE Micro, Dec. 2014
Jun YAO, Yasuhiko Nakashima, Mitsutoshi Saito, Yohei Hazama, Ryosuke Yamanaka
"EReLA: a Low-Power Reliable Coarse-Grained Reconfigurable Architecture Processor and Its Irradiation Tests," IEEE Transactions on Nuclear Science, Dec. 2014
Jun YAO, Mitsutoshi Saito, Shogo Okada, Kazutoshi Kobayashi, Yasuhiko Nakashima
"Understanding Variations for Better Adjusting Parallel Supplemental Redundant Executions to Tolerate Timing Faults," IEICE Trans, vol.Vol.J96-D, Sep. 2014
Yukihiro SASAGAWA, 姚　駿, 中島　康彦
"A Tightly Coupled General Purpose Reconfigurable Accelerator LAPP and Its Power States for HotSpot-Based Energy Reduction," IEICE Trans, vol.Vol.J96-D, Sep. 2014
Jun YAO, Yasuhiko Nakashima, Naveen DEVISETTI, Kazuhiro YOSHIMURA, Takashi NAKADA
"A Two-Order Increase in Robustness of Partial Redundancy Under a Radiation Stress Test by Using SDC Prediction," IEEE Transactions on Nuclear Science, Aug. 2014
Tanvir Ahmed, Jun YAO, Yasuhiko Nakashima
"Selective Check of Data-Path for Effective Fault Tolerance," IEICE Trans. on Information and Systems, Aug. 2013
Tanvir Ahmed, Jun YAO, Yuko Hara-Azumi, Shigeru Yamashita, Yasuhiko Nakashima
"High-Resolution Mapping of In vivo Genomic Transcription Factor Binding Sites Using In situ DNase I Footprinting and ChIP-seq. ," DNA Res, vol.印刷中, 2013.4.22
Onuma Chumsakul, Kensuke Nakamura, 倉田　哲也, Tomoaki Sakamoto, Jon L Hobman, 小笠原　直毅, 大島　拓, 石川　周
"演算器アレイにおける高信頼化命令写像手法," IEICE Trans., vol.Vol.J96-D, no.3, 2013.3
大上俊, 姚　駿, 中島　康彦
"DARA: A Low-Cost Reliable Architecture Based on Unhardened Devices and its Case Study of Radiation Stress Test," IEEE Transactions on Nuclear Science, 1 Dec. 2012
Jun YAO, Shogo Okada, Masaki Masuda, Kazutoshi Kobayashi, Yasuhiko Nakashima
"Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication," IEICE Trans., vol.to appear, Nov. 2012
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
"RazorProtector: Maintaining Razor DVS Efficiency in Large IR-drop Zones by an Adaptive Redundant Data-Path," IEICE Trans. on VLSI Design and CAD Algorithms, vol.E95-D, 27 Aug. 2012
Yukihiro SASAGAWA, Jun YAO, Takashi NAKADA, Yasuhiko Nakashima
"異種命令セットアーキテクチャを持つ高電力効率SMT プロセッサの開発," 電子情報通信学会論文誌D, vol.J95-D, no.6, 2012.6
吉村和浩, 中田　尚, 中島　康彦, 北村俊明
"時分割実行機構による演算器アレイ型アクセラレータの効率化," 情報処理学会論文誌コンピューティングシステム, vol.ACS39, 2012.5.10
岩上拓矢, 吉村和浩, 中田尚, 中島　康彦
"線形演算器アレイ型アクセラレータを備えた高電力効率プロセッサの開発," 電子情報通信学会論文誌D, vol.Vol.J95-D, no.9, pp1729-1737, 2012.5.10
齋藤　光俊, 下岡俊介, Devisetti Venkatarama Naveen, 大上俊, 吉村和浩, 姚　駿, 中田尚, 中島　康彦
"画像処理向け線形アレイアクセラレータの性能評価," 情報処理学会論文誌コンピューティングシステム, vol.ACS38, 2012.5
中田　尚, 吉村和浩, 下岡俊介, 大上俊, Devisetti Venkatarama Naveen, 中島　康彦
"Quantum Walks on the Line with Phase Parameters," IEICE Trans. on Foundations of Computer Science, vol.E95-D, no.3, pp722-730, Mar. 2012
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
"An Instruction Mapping Scheme for FU Array Accelerator," IEICE Trans. on Information and Systems, vol.E94-D, no.2, pp286-297, 1 Feb. 2011
Kazuhiro YOSHIMURA, Takuya IWAKAMI, Takashi Nakada, Jun YAO, Hajime Shimada, Yasuhiko Nakashima
"Quantum Walks on the Line with Phase Parameters," IEICE Trans. on Foundations of Computer Science, vol.採録決定, 2011
Marcos Villagra, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
"An Efficient Conversion of Quantum Circuits to a Linear Nearest Neighbor Architecture," Quantum Information and Computation, vol.11, no.1&2, pp141-166, Dec. 2010
Yuichi Hirata, Masaki Nakanishi, Shigeru Yamashita, Yasuhiko Nakashima
"複数イタレーションの一括再利用による並列事前実行の高速化," 情報処理学会論文誌コンピューティングシステム, vol.3, no.2, 2010.8
池谷友基(名工大), 津邑公暁(名工大), 松尾啓志(名工大), 中島　康彦
"量子計算の並列シミュレーションにおける通信量削減手法," 電子情報通信学会論文誌D, vol.J93-D, no.3, pp253-264, 2010.3.1
柴田　章博, 中田　尚, 中西　正樹, 山下　茂, 中島　康彦
"VLIW型命令キューを持つスーパースカラプロセッサの命令スケジューリング機構," 情報処理学会論文誌コンピューティングシステム, vol.2, no.2, pp1-15, 2009.6
中田　尚, 片岡晶人, 中島　康彦
"自動メモ化プロセッサにおける消費エネルギー制御," 情報処理学会論文誌：コンピューティングシステム, vol.1, no.2 (ACS 23), pp1-11, 2008.8
島崎裕介, 津邑公暁, 中島浩, 松尾啓志, 中島　康彦
"パス情報を用いた分岐フィルタ機構," 情報処理学会論文誌:コンピューティングシステム, vol.ACS15, pp108-118, 2006.9
三輪忍, 福山智久, 島田創, 五島正裕, 中島　康彦, 森眞一郎, 富田眞治
"マルチコアを想定した動的区間投機および区間再利用の試み," 第１８回STARCアドバンスト講座システムアーキテクチャセミナー -システムアーキテクチャの新しい要素技術-, pp131-149, 2006.7.26
中島　康彦
"セル投影型並列ボリュームレンダリングのEarly Ray Terminationによる高速化," 情報処理学会論文誌:コンピューティングシステム, vol.ACS14, pp124-136, 2006.5
高山征大, 森眞一郎, 中島　康彦, 富田眞治
受賞
"Featured Poster Award," 16 Apr. 2025
Babak Golbabaei, Kan Yirong, Renyuan Zhang, Yasuhiko Nakashima
"Best Paper Award," 【International Conference on Intelligent Systems and Networks】, 2025.3.24
Yu Eto, 中島　康彦
"Best Paper Award," IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC 2024), Dec. 2024
Hai Hau Nguyen, Pham Hoai Luan, Le Vu Trung Duong, Vu Tuan Hai, Tran Van Duy, Lam Duc Khai, Yasuhiko Nakashima
"ISOCC 2024 Telechips Award," IEEE 21st International SoC Conference (ISOCC 2024), Aug. 2024
Nguyen Ngoc Hung, Le Duc Hong An, Nguyen Van Tinh, Le Vu Trung Duong, Vu Tuan Hai, Pham Hoai Luan, 中島　康彦
"Outstanding Paper Award," CANDAR'23, 30 Nov. 2023
Le Vu Trung Duong, Pham Hoai Luan, Thi Hong Tran, Sang Duong Thi, Yasuhiko Nakashima
"CPSY優秀若手発表賞," 電子情報通信学会, 2023.3
藤江健吾, 宮川晃輔, 中原博研, 塩谷亮太, 五島正裕, 中島　康彦, 津邑公暁
"Best Track Award on Track SoC, NoC and Reconfigurable Systems," IEEE SBCCI2022, Sep. 2022
Hoai Luan Pham, Tran Thi Hong, Vu Trung Duong Le, Yasuhiko Nakashima
"Outstanding Effort Award," The 6th cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming (xSIG 2022), 2022.7
宮川晃輔, 中原博研, 津邑公暁, 中島　康彦
"Best Student Paper Award," IEEE International Conference on Computing, Electronics & Communications Engineering 2021, 17 Aug. 2021
Diem Thi Tran
"xSIG2021 Outstanding Research Award," xSIG 2021: The 5th. cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming, 2021.7
中原 博研, 武石 隆太郎, 津邑 公暁, 中島　康彦
"Featured Poster Award," IEEE Symp. on Low power and high-speed chips, 16 Apr. 2021
Tomoya Akabe, Mutsumi Kimura, Yasuhiko Nakashima
"Outstanding Paper Award," 27 Nov. 2020
Thi Thu Thao Khong, Takashi Nakada, Yasuhiko Nakashima
"Best Paper Run-up Award," IEEE Int. System-on-Chip Conf., Sep. 2020
Renyuan ZHANG, Tati Erlina, Tinh Van Nguyen,, Yasuhiko Nakashima
"Best Paper Award of the 4th IEEE SigTelCom Conference," IEEE SigTelCom 2020, 25 Aug. 2020
Tran Thi Diem, Mutsumi Kimura, Yasuhiko Nakashima
"Outstanding Originality Award," The 3rd. cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming, May. 2019
Jun IWAMOTO, Yuma KIKUTANI, Renyuan ZHANG, Yasuhiko Nakashima
"Best M1 Student Award," xSIG2018, 2018.5
平賀由利亜
"電子情報通信学会関西支部 学生会 奨励賞," 電子情報通信学会 関西支部 学生会, 2018.3.1
菊谷 雄真, 山野 龍佑, 一倉 孝宏
"IEICEフェロー," IEICE, 2018.3
中島　康彦
"Outstanding Research Achievement Award," 2017 International Conference for Top and Emerging Computer Scientists (IC-TECS 2017), 24 Dec. 2017
Tran Thi Hong
" IC-TECS 2017 1'st Prize in Poster Presentation," IC-TECS 2017, 23 Dec. 2017
Duc-Phuc Nguyen, Dinh-Dung Le, Dai-Long Hoang, Satoya Yoshida
"Outstanding Paper Award," CANDAR'17, Nov. 2017
Renyuan ZHANG, Takashi Nakada, Yasuhiko Nakashima
"研究会推薦博士論文," 一般社団法人　情報処理学会, 15 Aug. 2017
Yuttakon Yuttakonkit
"Outstanding M2 Student Award," xSIG 2017: The 1st. cross-disciplinary Workshop on Computing Systems, Infrastructures, and Programming, 26 Apr. 2017
Keisuke Fujimoto
"best oral presentation award," ICFCC, 22 Apr. 2017
Nguyen Duc Phuc
"電子情報通信学会コンピュータシステム研究会優秀若手講演賞," 電子情報通信学会コンピュータシステム研究会, 2016.8.9
亀田友哉
"情報処理学会システム・アーキテクチャ研究会 若手奨励賞," 情報処理学会システム・アーキテクチャ研究会, 2015.10.8
枝元 正寛
"電子情報通信学会コンピュータシステム研究会優秀若手デモ/ポスタ賞," 電子情報通信学会コンピュータシステム研究会, 2015.10.8
嶋谷知
"IEEE Symposium on Low-Power and High-Speed Chips 2015 Featured Poster Award】," IEEE Symposium on Low-Power and High-Speed Chips 2015, Apr. 2015
Shohei Takeuchi, Tran Thi Hong, Takamaeda Shinya, Yasuhiko Nakashima
"IEEE Symposium on Low-Power and High-Speed Chips 2014 Best Feature Award," IEEE Symposium on Low-Power and High-Speed Chips 2014 , 16 Apr. 2014
Masakazu Tanomoto, Jun YAO, Yasuhiko Nakashima, Yangtong Xu, Xinliang Wang, Wei Xue
"SLDM研究会優秀発表学生賞," 情報処理学会, 2013.11
早苗駿一, 原祐子, 山下茂, 中島　康彦
"ICNC'12 Best Paper Award," IEICE, Dec. 2012
Kazutaka KAMIMURA, Ryosuke ODA, Tatsuhiro YAMADA, Tomoaki TSUMURA, Hiroshi MATSUO, Yasuhiko Nakashima
"電子情報通信学会集積回路研究会優秀若手研究ポスター賞," 電子情報通信学会, 2011.5.16
大上俊
"ICNC'10 best paper award," 1st Int'l. Conf. on Networking and Computing (ICNC'10), 18 Nov. 2010
Tomoki IKEGAYA, Tomoaki TSUMURA, Hiroshi MATSUO, Yasuhiko Nakashima
"情報処理学会関西支部大会学生奨励賞," 情報処理学会関西支部, 2010.9.22
渡邊良二
"優秀発表学生賞," 情報処理学会 システムLSI設計技術研究会, 2010.9.2
大賀健司
"IEEE SSCS Japan Chapter Academic Research Award," 電子情報通信学会LSIとシステムのワークショップ2009, 2009.5
吉村和浩, 市来亮人, 中田　尚, 中島　康彦
"情報処理学会関西支部大会学生奨励賞," 情報処理学会, 2009
上利宗久
"FIT2007論文賞+船井ベストペーパー賞," FIT2007, 2007.9
島崎裕介, 池内康樹, 鈴木郁真, 津邑公暁, 松尾啓志, 中島　康彦
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他の研究者

木村　睦

職位 客員教授
領域 情報科学領域 AI基盤情報学
研究室 コンピューティング・アーキテクチャ

Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。

Tran Thi Hong

職位 客員准教授
領域 情報科学領域 AI基盤情報学
研究室 コンピューティング・アーキテクチャ

Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。

KAN YIRONG

職位 助教
領域 情報科学領域 AI基盤情報学
研究室 コンピューティング・アーキテクチャ

Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。

PHAM HOAI LUAN

職位 助教
領域 情報科学領域 AI基盤情報学
研究室 コンピューティング・アーキテクチャ

Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。

LE VU TRUNG DUONG

職位 助教
領域 情報科学領域 AI基盤情報学
研究室 コンピューティング・アーキテクチャ

Society5.0への実装に適した次世代超小型・超低電力・高性能計算基盤の研究開発を実施。特に、限界が見えてきたノイマン型コンピュータと、 今後有望な各種非ノイマン型コンピュータの融合による、画像処理、科学技術計算、エッジAIコンピューティング基盤、ブロックチェインアクセラレータについて、 デバイス、ハードウェア、アーキテクチャ、ソフトウェアまでの幅広い先端基盤技術を追求する。